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Design of FPGA-based hardware acceleration system for elliptic curve encryption algorithm

By: Huiwei Yang 1
1Department of Information and Artificial Intelligence, Wuhu Institute of Technology, Wuhu, Anhui, 241000, China

Abstract

Traditional cryptographic algorithms have limitations in terms of efficient implementation, especially the need for hardware acceleration is more urgent. In this paper, an FPGA-based hardware acceleration system for elliptic curve encryption algorithm is designed and implemented. The system adopts Xilinx Spartan-6 series development board, and optimizes the acceleration process of elliptic curve encryption algorithm by combining the parallel computing capability of FPGA. The experimental results show that the system significantly improves the encryption speed when performing encryption operations compared with the traditional software implementation. Especially when dealing with complex image data, the system is able to deal with the equalization of the image grayscale histograms, and exhibits strong anti-attack ability. Through testing, the system’s encrypted image information entropy value is close to the ideal value of 8, the NPCR value reaches 99.6814%, and the UACI value is 33.3923%, which effectively guarantees the security of the data. Based on these experimental results, the system ensures a high level of security while improving the encryption efficiency, providing an efficient solution for data protection in IoT and cloud computing.